The course covers modern computer architecture. Topics include building functional unit using lower level components in an optimal way (cost/power/performance), processor specification using ISA and implementing high-level constructs, performance, pipelining and multiple issue, memory hierarchy and technological trends.
This course can be applied towards:
CS 370 (System Architecture and Software).
Yashwant K. Malaiya is a Professor in the Computer Science Department at Colorado State University. He has published more than 175 papers in the areas of fault modeling, software and hardware reliability, testing and testable design, and quantitative security risk evaluation.
He served as the General Chair of 1993 and 2003 IEEE International Symposium on Software Reliability Engineering (ISSRE). He co-edited the IEEECS Technology Series books "Software Reliability Models, Theoretical Developments, Evaluation and Applications" and "Bridging Faults and IDDQ Testing".
He has served as chair of TC on Microprogramming and Microarchitecture, chair of software test subcommittee of TTTC and a vice-chair of the TCSE subcommittee on software reliability engineering, a member of the IEEECS TAB Executive Committee, and a vice-chair of the IEEE CS Awards Committee and a commissioner of the ABET Computing Accreditation Commission. He is a recipient of the IEEE Third Millennium Medal, and the IEEE Computer Society Golden Core award.